core/) with a stable C FFI for cross-platform integration. This page provides an overview of the module structure and key architectural concepts.
Crate Organization
The emulator is organized into several modules, each responsible for a specific aspect of the TI-84 Plus CE hardware:Module Hierarchy
Memory Map
The TI-84 Plus CE uses the eZ80’s 24-bit address space:| Address Range | Region | Module |
|---|---|---|
| 0x000000 - 0x3FFFFF | Flash (4MB) | memory |
| 0x400000 - 0xCFFFFF | Unmapped | — |
| 0xD00000 - 0xD657FF | RAM + VRAM | memory |
| 0xD65800 - 0xDFFFFF | Unmapped | — |
| 0xE00000 - 0xFFFFFF | Memory-mapped I/O | peripherals |
Memory Module
Thememory module provides:
- Flash: 4MB NOR flash for OS and user programs
- RAM: 256KB user RAM + ~150KB VRAM
- Address constants:
addr::FLASH_START,addr::RAM_START, etc.
Bus Module
Thebus module handles:
- Address decoding and routing
- Memory access cycle timing
- I/O port mapping
- Memory protection and NMI violations
CPU Module
Thecpu module implements the Zilog eZ80 processor:
- 24-bit addressing: Full eZ80 ADL (Address Data Long) mode support
- Register set: A, F, BC, DE, HL, IX, IY, SP (with shadow registers)
- Instruction execution: ~600 opcodes including eZ80-specific instructions
- Interrupt handling: Maskable (IRQ) and non-maskable (NMI) interrupts
- Cycle-accurate timing: Matches CEmu reference implementation
Peripherals Module
Theperipherals module contains all memory-mapped hardware controllers:
Core Peripherals
- Control Ports (0xE00000, 0xFF0000): Power, CPU speed, device configuration
- Flash Controller (0xE10000): Flash memory control and wait states
- Interrupt Controller (0xF00000): Hardware interrupt routing
- LCD Controller (0xE30000): Display timing, DMA, palette
- General Timers (0xF20000): Three 32-bit timers with match/overflow
- Keypad Controller (0xF50000): 8×8 key matrix scanner
- Watchdog Timer (0xF60000): System watchdog
- RTC (0xF80000): Real-time clock
- Backlight (0xFB0000): LCD backlight PWM control
Scheduler Module
The scheduler manages timed events for peripherals:- CPU speed changes (6/12/24/48 MHz)
- Event priority and ordering
- Relative and absolute event scheduling
C FFI Interface
The emulator exposes a thread-safe C API throughSyncEmu:
Build Configuration
The crate supports multiple build targets:Platform Targets
- Desktop: Static library with C header
- iOS: Dynamic library with prefixed symbols
- WASM: WebAssembly module with JS bindings
- Android: JNI-compatible shared library
Testing
The crate includes extensive tests:Next Steps
Emu Struct
Learn about the main emulator orchestrator
Memory Types
Explore Flash, RAM, and memory map types
CPU Module
Dive into the eZ80 CPU implementation
Peripherals
Understand peripheral controllers