Required Fields
Project name used for generated files and namespaces.
Path to the input XEX or ELF executable file to recompile.
Output directory for generated C++ source files.
Patch Files (Not Yet Implemented)
Path to binary patch file to apply before analysis.
Path to save the patched executable.
Code Generation Options
These flags control register allocation and optimization behavior:Skip saving/restoring the Link Register (LR) when not modified. Reduces overhead for leaf functions.
Skip Machine State Register (MSR) emulation. Use only if the binary doesn’t modify MSR.
Allocate Count Register (CTR) as a local variable instead of state struct field. Improves performance when CTR is used locally.
Allocate XER (Fixed-Point Exception Register) as local variable.
Allocate reserved registers (r2, r13) as local variables.
Allocate Condition Register fields as local variables.
Allocate non-argument registers (r11-r31) as local variables when not used for parameters.
Allocate non-volatile registers (r14-r31) as local variables.
Generate SEH (Structured Exception Handling) wrapper functions for Windows exception handling.
Special Addresses
Address of
longjmp function for setjmp/longjmp analysis. Use hex format: 0x82000100.Address of
setjmp function for setjmp/longjmp analysis.Analysis Section
Fine-tune the analysis pipeline:Maximum bytes to extend function boundaries when jump table targets are found outside initial function size.
Number of consecutive invalid instructions before marking region as data (not code). Helps detect embedded constants.
Size in bytes (1MB default) to warn about unusually large functions. May indicate analysis errors.
Array of exception handler function addresses for code region segmentation.
Invalid Instructions Hints
Mark regions that contain data (not code) to prevent disassembly errors:Array of data regions that should not be disassembled as code.Each entry requires:
data(uint32): Starting address of data regionsize(uint32): Size of data region in bytes
Indirect Call Hints
Markbctr instructions as indirect calls (vtable dispatch, computed jumps) rather than switch tables:
Array of addresses where
bctr instructions are vtable/computed calls, not switch table jumps.Example Configuration
Validation Rules
The configuration is validated before code generation:- Alignment: All addresses must be 4-byte aligned (PowerPC instruction size)
- Required fields:
file_pathmust be provided - No overlaps: Function boundaries cannot overlap (standalone functions)
- Size constraints: Cannot specify both
sizeandendfor functions - End address: If using
end, it must be greater than the start address
See Also
- Functions Configuration - Function and chunk definitions
- Hooks Configuration - Mid-assembly hooks
- Overview - Configuration system overview